A MOSFET (metal-oxide semiconductor field-effect transistor) is a special type of field-effect transistor (FET) that works by electronically varying the width of a channel along which charge carriers flow. The wider the channel, the better the device conducts. The charge carriers enter the channel at a source electrode and exit via a drain electrode. The conductivity of the channel is controlled by the voltage on a gate electrode, which is located physically between the source and the drain and is insulated from the channel by a thin layer of metal oxide.
The ‘metal’ in the acronym MOSFET is now often a misnomer because the previously metal gate material is now typically a layer of polysilicon (polycrystalline silicon). That is, aluminum was typically used as the gate material until the 1980s when polysilicon became dominant due to its capability to form self-aligned gates. IGFET is a related, more general term meaning insulated-gate field-effect transistor, and is almost synonymous with MOSFET, though it can refer to FETs with a gate insulator that is not oxide. Some prefer to use “IGFET” when referring to devices with polysilicon gates, but most still refer to them as MOSFETs, and that convention will be adopted herein.
There are two ways in which a MOSFET can function. The first is known as depletion mode where when there is no voltage on the gate the channel exhibits its maximum conductance. As the voltage on the gate increases (either positively or negatively, depending on whether the channel is made of P-type or N-type semiconductor material) the channel conductivity decreases. The second way in which a MOSFET can operate is called enhancement mode where when there is no voltage on the gate there is, in effect, no channel and the device does not conduct. A channel is produced by the application of a voltage to the gate. The greater the gate voltage, the better the device conducts.
The MOSFET has certain advantages over the conventional junction FET, or JFET. Because the gate is insulated electrically from the channel, no current flows between the gate and the channel, no matter what the gate voltage (as long as it does not become so great that it causes physical breakdown of the metallic oxide layer). Thus, the MOSFET has practically infinite impedance. This makes MOSFETs useful for power applications. The devices are also well suited to high-speed switching applications.
A power MOSFET is a specific type of MOSFET designed to handle large power. Compared to the other power semiconductor devices (e.g. Isolated Gate Bipolar Transistors (“IGBTs”), thyristors, etc.) its main advantages are high commutation speed, good efficiency at low voltages and an isolated gate that makes it easy to drive. The power MOSFET shares its operating principles with its low-power counterpart, the lateral MOSFET. The power MOSFET is the most widely used low-voltage (i.e. less than 200 V) switch. It can be found in most power supplies, DC-to-DC converters and low voltage motor controllers.
FIG. 1 is a cross section of a prior art Vertical Diffused Metal Oxide Semiconductor (VDMOS) showing an elementary cell. Cells are typically very small (some micrometers to some tens of micrometers wide) and a power MOSFET is typically composed of several thousand of them. The cross section illustrates the “verticality” of the device where the source electrode is located over the drain, resulting in a current mainly in the vertical direction when the transistor is in the on-state. As used herein, a “vertical MOSFET” and a “power MOSFET” will be used interchangeably. The “diffusion” in VDMOS refers to the manufacturing process: the P wells are obtained by a double diffusion process for the P and N+ regions.
It should be noted that there are many types and designs of power MOSFETs and that the example MOSFET of FIG. 1 is simply one of many. FIG. 2 illustrates, in schematic form, a generalized power MOSFET 9. A semiconductor body B, typically silicon, has a source S on one side and a drain D on the other side. A gate G is provided on the source S side. The gate G is, of course, insulated from the body B and is connected to the gates of the typically thousands of MOSFET cells. Likewise the source S is connected to the sources of the MOSFET cells and the drain D is connected to the drains of the MOSFET cells.
A buck regulator is a DC-to-DC switching converter topology that takes an unregulated input voltage and produces a lower regulated output voltage. The lower output voltage is achieved by chopping the input voltage with a series connected switch (transistor) which applies pulses to an averaging inductor and capacitor. In a MOSFET buck regulator two MOSFETS are used where the drain for a “low side” MOSFET and source of a “high side” MOSFET are connect together.
FIG. 3 is a schematic of a prior art MOSFET circuit 10 useful for buck regulators. The circuit 10 includes a first MOSFET 12 and a second MOSFET 14 connected in series. That is, source S of the first MOSFET 12 is coupled to the drain D of second MOSFET 14 forming a node known as the “phase.”
FIG. 4 illustrates a possible physical connection of MOSFETS 12 and 14 according to the prior art. Since the vertical MOSFETS 12 and 14 have their drains on the back side of the silicon both of these MOSFETS cannot be in contact with same conductive surface or “plate” since this would short their drains. This requires the drains to be attached to two separate plates, P1 and P2, respectively, which are electrically isolated from each other. Multi-bond wires 20 couple the source S of MOSFET 12 to the drain D of MOSFET 14. Therefore the plate P2 serves as the phase in this example.
The packaging of semiconductors is becoming increasingly important. Packaging can be used to optimize semiconductor performance in many ways including heat dissipation, shielding and interconnect simplification. For example, Standing et al. in U.S. Pat. Nos. 6,624,522, 6,930,397 and 7,285,866, incorporated herein by reference, teaches packages well suited for MOSFETs. Standing's devices includes a metal can which is receptive to a MOSFET. The MOSFET is oriented such that its drain electrode is facing the bottom of the can and is electrically connected to the same by a layer of conductive epoxy, a solder or the like. The edges of the MOSFET are spaced from the walls of the can and the space between the edges of the MOSFET and the walls of the can is filled with an insulating layer.
FIG. 5 illustrates a can-type package for a MOSFET in accordance with the prior art. The can 16 encloses a power MOSFET 18 with the drain D electrically coupled to the electrically conductive metal can 16. The can package, while advantageous in general, is not well suited for enclosing pairs of power MOSFETs that are interconnected as set forth in FIG. 3. This is because of the aforementioned problem of shorting the drains on a conductive plate, i.e. the bottom of the electrically conductive metal can 16.
These and other limitations of the prior art will become apparent to those of skill in the art upon a reading of the following descriptions and a study of the several figures of the drawing.